Graham,
Can you share this data that you have with me.
Victor,
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Graham Naisbitt
Sent: Thursday, June 08, 2006 12:08 PM
To: [log in to unmask]
Subject: Re: [TN] Electrical test Failures on Bare Board Finsihes, in
particular OSP
Hi Roland
We have some data and I will try to dig out the relevant files to
send you.
In essence we found that HASL offers the least favorable SIR values
lead or lead-free.
We are presently finishing a major study of lead-free ENIG, ImSn and
ImAg so might have some better info/data-sets by the end of June.
As to your concerns about OSP, from what you describe I would be more
worried about solderability if the OSP is compromised.
Give me a few days to pull out the info...unless you need urgently?
Graham Naisbitt
On 7 Jun 2006, at 16:50, Roland Jaquet wrote:
> Dear Technetters,
>
> Earlier today I sent an email that for some reason got erased. I
> apologize.
>
> I am wondering if there is some knowledge regarding the surface
> electrical
> insulation / resistance depending on the type of Surface Finishes
> such as
> for the bare PCBs as below:
>
> #1 Electroless Nickel Immersion Gold
> #2 Immersion Tin
> #3 HAL Lead free
> Organic Solderability/Surface Preservative
> Electroplated nickel & gold
> Electroless nickel immersion thick gold
> Immersion Silver
> Electroless Nickel & Palladium, Immersion Gold
> Hot air solder leveling
> Electroless Thick Gold
> SAC
> (any finishes I am missing here?)
>
> For instance, I am wondering what could be the resistance of an OSP
> finish
> if the contact is such as a feather and flat, versus conical point
> digging
> in?
>
> Anyone met this kind of problem yet?
>
> In our case, we are considering contact less Electrical Test and we
> worry
> about the different issues we could get in with such a process!
>
> Any suggestion?
>
> Thank you
> Best Regards
> Roland
>
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