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May 2006

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Subject:
From:
John Burke <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, John Burke <[log in to unmask]>
Date:
Tue, 30 May 2006 10:38:36 -0700
Content-Type:
text/plain
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text/plain (74 lines)
HI Susan,

I have been using 6 reflow cycles minimum to the profile in Jedec 20C (260
centigrade) as a basis for board eval, looking at de-lam in bga via fields
and testing after every cycle - I am copying this email to Edy Luenberger of
Multek. I was privileged to see a presentation by Multek on the lengths they
have gone to to qualify laminate materials for lead free and all I can say
is Awesome!!

If they will share I don't know, but at least we can ask.

Maybe if you took this email off - line with Edy?

Edy, need some serious input here - if you are willing to share please do -
if not tell me to back off - but that work that you guys have been doing is
seriously needed.

John

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Susan Mansilla
Sent: Tuesday, May 30, 2006 9:30 AM
To: [log in to unmask]
Subject: Re: [TN] Dip or Float

Hi Richard
I wish I had an expert opinion on this one.  The rigid board group is trying
to identify what tests are being used by people who buy boards to determine
if
the boards will withstand the elevated temp of Lead-Free.  So far the
consensus has indicated a new test needs to be developed that involves
multiple
passes through IR reflow.  What the parameters would be is still up for
grabs.

The Thermal Stress test, as far as I am aware of, has been able to weed out
infant mortality of "regular" boards used in current surface mount and wave
soldering processes.

All bets are off when it comes to the extended times and temperatures
required to accomodate all of the combinations of leaded and lead free
assembly
processing.

Any and all recommendations would be appreciated as the 6012 group states
this investigation as to what is needed.

Susan Hott
Robisan Lab

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