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christian ge <[log in to unmask]> 写道： 日期: Thu, 25 May 2006 10:10:55 +0800 (CST)
发件人: christian ge <[log in to unmask]>
主题: 回复： RE: [TN] Thermal cycle test for
plated through holes filled with epoxy ink
and cap plated on the top
收件人: "Whittaker, Dewey (AZ75)" <[log in to unmask]>
Hello Dewey,
The test set-up is -40degree C to +145degree C, 1000 cycles. Dwell time at each temperature is 30minutes. Now the problem is that we see complete barrel crack (i.e length of barrel crack is equal to the plated copper thickness on hole wall) after cross-section.
Thanks,
Chris.
"Whittaker, Dewey (AZ75)" <[log in to unmask]> 写道：
Not knowing your test set-up and how accurate your resistance measurements were and any other relevant correlation factors, I couldn't say. However IMHO anything above a 2 % resistance gain is a failure. Varying degrees of barrel cracking will almost always be a reality, but not necessarily a failure when it comes to thermal cycling or other accelerated stress testing.
Dewey
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of christian ge
Sent: Monday, May 22, 2006 11:53 PM
To: [log in to unmask]
Subject: [TN] Thermal cycle test for plated through holes filled with epoxy ink and cap plated on the top
Hello Technetters,
I need your help on the following thermal cycle test problem.
Recently we asked our PCB suppliers to do 1000 cycle thermal cycle test for 6L, daisy chain boards with plated through holes filled with epoxy ink and cap plated on the top of the holes( or via-in-pad design). The resistance change before and after thermal cycle test is less than 5%, however the holes have complete barrel crack. Have you seen this kind of problem before? Can I approve the supplier's test result?
Here are some more information about the test for your reference.
1) board thickness: 1mm (40mils)
2) hole size: 20mils, 18mils, 15mils, 10mils. All have complet barrel crack except the holes of 10mils .
Thanks for your help in advance!
Chris
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