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May 2006

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Subject:
From:
Jeffrey Bush <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Jeffrey Bush <[log in to unmask]>
Date:
Tue, 2 May 2006 12:45:35 -0400
Content-Type:
text/plain
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text/plain (62 lines)
These are likely punched which is a common practice in Asia.  Scoring
will leave a slight rough edge but it sounds like these are punched.
Pucnching techniques of multi-layers need to be closely evaluated as the
die pressure can create reliability issues and since these are generally
done on PCB's that are not presenting the highest reliability to begin
with, some performance problems can develop.   

Jeffrey Bush
Director, Quality Assurance and Technical Support
VERMONT CIRCUITS INCORPORATED 
           76 Technology Drive - POB 1890 
              Brattleboro, Vermont 05302
                Voice - 802.257.4571 ext 21
                    Fax - 802.257.0011
                       <http://www.vtcircuits.com/> 
                           

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Victor G. Hernandez
Sent: Tuesday, May 02, 2006 11:33 AM
To: [log in to unmask]
Subject: [TN] PWB de-paneling

Fellow TechNetters:

   What are some common acceptable practices for de-paneling PWB?
I am more familiar with routing, which provides a smooth edge with good
quality control.

I have observed some PWB from overseas suppliers with an edge that
appears snapped with frayed edges.
Is this in according with IPC Standards?

Victor,

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