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May 2006

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Subject:
From:
Roger Stoops <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Roger Stoops <[log in to unmask]>
Date:
Fri, 12 May 2006 09:06:35 -0400
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Hi Phil,

I see no one answered on your question re: thermal stitching.  Yes, is
is common in the industry, although some EMS providers don't like the
idea of vias under an SMT SJ.  Many new voltage regulator packages have
metal contacts on bottom of package that solders to board, and some
vendors suggest vias to improve heat flow.

Roger
 

-----Original Message-----

From: TechNet [mailto:[log in to unmask] <mailto:[log in to unmask]> ] On
Behalf Of Phil Nutting
Sent: Thursday, May 11, 2006 10:18 AM
To: [log in to unmask]
Subject: [TN] Use of Fiducials & thermal stitching

My disclaimer... I'm a neophyte at SMT and need some education.

Fiducials;
At what point do I need fiducials on my boards?
Is there a specific pitch or device size that will require fiducials?
Is there a "Cliff's Notes" for this?

Thermal Stitching;
We have an SMT power transistor that has about 16 thermal stitch holes
located directly under the device. The adjacent pad area is taken up by
heat sink. Is this "industry standard"?

Short of reading all the IPC standards... zzzzzzzz... oh sorry, I dozed
off there, is there a good source for coming up to speed on SMT and
board layout good standards?

Thanks in advance,

Phil Nutting

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