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May 2006

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Subject:
From:
Leo Higgins <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Leo Higgins <[log in to unmask]>
Date:
Fri, 5 May 2006 11:11:00 -0700
Content-Type:
text/plain
Parts/Attachments:
text/plain (95 lines)
Joe is correct.  For typical IC package substrates that are plated with
electrolytic Ni/Au pad finishes on the wire bond pads all the pads must be
able to be electrically connected to become the cathode in the plating
process.  The wire bond pads, or fingers, are simply the exposed ends of
extensions of conductor nets that run under solder mask on the surface or
run out towards the edge of the substrate on an internal plane.  The ends of
these nets must connect to a plating buss which is connected to the cathodic
pole in the electrolytic plating process.  When the final substrate is
singulated from the panel in which it is manufactured, each wire bond finger
has a length of net remaining that serves no purpose in the substrate
interconnection, and was only used to make a connection to the plating buss.
This is the plating tail.  For low frequency devices it is cheaper to just
leave the tail on the substrate.  At higher frequencies the tail can act as
a stub to propagating signal, and can cause signal reflections and radiated
emissions, so higher performance BGA designs require these plating tails to
be removed via an etching process and this adds cost.  These substrates
often have electrolytic Ni/Au BGA pads that are internally connected to the
wire bond fingers.  If the substrate does not permit electrolytic Ni/Au BGA
pad finish, the cost grows even more since the process to put elytic Ni/Au
on the WB pads and a different BGA pad finish (OSP, imm Sn, etc.) requires
multiple mask/strip operations, in  addition to the need to etch away the
plating tails for a high performance package.  Suppliers have come up with
several different means to provide tail-free structures.

Best regards,
Leo

Leo M. Higgins III, Ph.D.
Vice President, Technical Operations
ASAT, Inc.
3755 Capital of Texas Highway, Suite 100
Austin, Texas     78704

office phone   512-383-4593
mobile           512-423-2002
[log in to unmask]
www.asat.com



-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Joe Fjelstad
Sent: Friday, May 05, 2006 9:32 AM
To: [log in to unmask]
Subject: Re: [TN] Plating Tails


In a message dated 5/4/2006 10:35:09 PM Pacific Daylight Time,
[log in to unmask] writes:

What is  called Plating Tails in Package design ? and what's the purpose ?
pls  explain me.

Thanks and Regards
Suganthi


Hello Suganthi,

I have not heard the term used before (new terms seem to pop in  to the
lexicon all of the time) but I surmise that these are the remnants  of a
plating
buss such as those often used for plating wire bond contacts.  There might
be a
more knowledgeable definition forthcoming from someone more  familiar with
the
term and its genesis.

Kind regards,
Joe

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