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April 2006

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Subject:
From:
Jeffrey Bush <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Jeffrey Bush <[log in to unmask]>
Date:
Tue, 4 Apr 2006 11:28:18 -0400
Content-Type:
text/plain
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text/plain (70 lines)
It is a minimum requirement for PCB fabrication to test as a minimum the
cleanliness of the board surface prior to soldermask coating. IPC-TM-650
2.3.25 provides the test method for the Solvent Extract Test.  Telecom
does require some additional testing for SIR testing also - Reference
Telcordia (Bellcore) TA-NWT-000078.  It is also advisable to maintain
cleanliness control and audit programs for Ionic Contamination and SIR
for inner layer cores prior to bonding and post final finish -
specifically HASL.    

Jeffrey Bush
Director, Quality Assurance and Technical Support
VERMONT CIRCUITS INCORPORATED 
           76 Technology Drive - POB 1890 
              Brattleboro, Vermont 05302
                Voice - 802.257.4571 ext 21
                    Fax - 802.257.0011
                       <http://www.vtcircuits.com/> 
                           

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Kevin Glidden
Sent: Tuesday, April 04, 2006 11:05 AM
To: [log in to unmask]
Subject: [TN] PCB cleanliness prior to soldermask

Is there a spec for testing a bare PCB prior to solder mask application?
Is
it customary to perform an ionic cleanliness test prior to application
of
SM?



Kevin Glidden
Manufacturing Engineer
Luminescent Systems Inc.
4 Lucent Drive
Lebanon, NH 03766-1439
Tel # (603) 643-7766 ext. 3152
Fax # (603) 643-5947



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