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April 2006

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Subject:
From:
Roger Stoops <[log in to unmask]>
Reply To:
(Leadfree Electronics Assembly Forum)
Date:
Fri, 28 Apr 2006 12:17:05 -0400
Content-Type:
text/plain
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text/plain (96 lines)
John,

I think you're on to something there... 

Sounds like the J-STD-609 will be handy to have.  Then the drill drawing
could have a note instructing the vendor to mark the board per the -609
standard, or just put the mark in silkscreen (forces a rev change if
plating type is changed).

BTW, it's Friday y'all!
Roger

-----Original Message-----
From: Leadfree [mailto:[log in to unmask]] On Behalf Of John Parsons
Sent: Friday, April 28, 2006 10:59 AM
To: [log in to unmask]
Subject: Re: [LF] Marking and identification pcb

I cannot find any requirement in IPC-1066 for the marking of raw PCB's.
Where are you guys reading that?  Section 5.1 talks about labeling for
2nd level interconnect.

John
-----Original Message-----
From: Leadfree [mailto:[log in to unmask]] On Behalf Of Phil Nutting
Sent: Friday, April 28, 2006 5:22 AM
To: [log in to unmask]
Subject: Re: [LF] Marking and identification pcb

But until this J-STD is published I believe your interpretation of
IPC-1066 is correct.  That is the logic I have applied to our products.
No assembly will get the "No Pb" symbol until every component is
lead-free, but the bare boards get either an e1 or e2.

Phil

-----Original Message-----
From: Leadfree [mailto:[log in to unmask]] On Behalf Of Kane, Joseph E (US
SSA)
Sent: Friday, April 28, 2006 8:18 AM
To: [log in to unmask]
Subject: Re: [LF] Marking and identification pcb

J-STD-609 is in final draft, and it includes codes for PWB's.  Under
this scheme, SAC finish would be code b1, NiAu would be b4.

-Joe


-----Original Message-----
From: Rosario Scarano [mailto:[log in to unmask]]
Sent: Friday, April 28, 2006 7:51 AM
To: [log in to unmask]
Subject: [LF] Marking and identification pcb


Hello,

 I'm still having a dispute with a supplier about the finishing
identification of printed circuits. It's about an immediate
identification at incoming inspection, of which kind of external
finishing is applied on the pcb. I mean, when I receive a bare printed
circuit board I want to understand and differentiate in my inventory
PCB's having an external finishing of NI-AU from the ones that don't
(for example SnAgCu). How can I get this differentiation?

According to the IPC-1066 the producer has to mark with the symbols
e1,e2...
according to finishing and solder processes used. Is it right?? If not
could you help me on how to correctly apply the norms?



 Best regards

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