For your information. Follow up on your own, as this workshop was during
IPC Expo.
Denny
----- Forwarded by Dennis Fritz/MacDermid/MACDERMID/US on 03/02/2006 10:13
AM -----
Georgia Tech Packaging Research Center <[log in to unmask]>
03/01/2006 04:29 PM
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Industry Consortia Workshop on Embedded Actives & Passives (EMAP) for
Electronics Convergence
A General Announcement to Industry Partners and Potential Partners
Industry Consortia Workshop on Embedded Actives & Passives (EMAP) for
Electronics Convergence Held at Georgia Tech on Feb. 8, 2006
GT-PRC organized a focused workshop on EMAP on Feb. 8, �06 at Georgia
Tech. Thirty companies covering the industry sectors of systems,
semiconductors, materials, substrates and equipment suppliers, attended
the workshop. The objective of this workshop was to look at the state of
the art in embedded actives and passives technologies, both from industry
and research perspectives, and discuss on the formation of an industry
consortium to address the next generation EMAP design and technology
challenges. There were five invited talks from Raytheon, Infineon,
Broadcom, EPCOS and GE highlighting the state of the art in embedded
actives and passives, SIP/SOP technologies for system integration from
industry�s perspective.
Over the past 10 years, GT-PRC has developed world class capabilities in
mixed signal design and test, thermal management, advanced substrate
technologies, embedded actives and passives, advanced interconnection
techniques and reliability. From GT-PRC, there were several presentations
on the application of these core expertises to EMAP technologies. GT-PRC
is collaborating with two academic research partners; CALCE (Univ. of
Maryland, USA) and the Institute of Microelectronics (IME, Singapore), in
the areas of quality and reliability and ultra thin silicon technologies
for embedded actives. Presentations from IME included the R&D challenges
in ultra thin silicon technologies (wafer thinning, dicing, die alignment
and self assembly techniques) and CALCE�s presentation covered the
quality and reliability aspects of EMAP, the physics of failure approach
for reliability estimation, and modeling.
Seven research elements were identified during the workshop:
1. Electrical design
2. Embedded passives
3. Ultra thin substrate
4. Ultra thin silicon
5. Ultra fine pitch interconnects
6. Thermal management solutions
7. Quality and reliability
Many companies expressed interest in pursuing the formation of this
consortium. A white paper covering the details of these research elements
will be sent to companies on March 8th. Follow-up discussion with
companies will take place in spring �06. The consortium is set to launch
on July 1, �06.
If You Are Interested: Interested companies, please contact Prof. Rao
Tummala ([log in to unmask], 404-894-9097), Dr. Chong Yoon (
[log in to unmask], 404-385-6231), or Dr. Mahadevan Iyer (
[log in to unmask], 404-385-7302).
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