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February 2006

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Subject:
From:
"Macko, Joe @ IEC" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Macko, Joe @ IEC
Date:
Mon, 27 Feb 2006 12:39:10 -0800
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Happy Holden,

Hello.
The Selectron paper on HD VIP sounds interesting. How/where can I obtain a
copy?

Thanks
joe

-----Original Message-----
From: Happy Holden [mailto:[log in to unmask]] 
Sent: Friday, February 24, 2006 1:26 PM
To: [log in to unmask]
Subject: Re: [TN] Via in Pad x Voids on Solder Process

Marcello,
Is this voids in the solder paste after assembly or voids in the board for 
the sequential laminations?  Have you seen the Solectron paper on HDI VIP 
voids as a function of blind-via placement and final finish?
Happy Holden
Asian Pacific Materials



Marcello Brett Malteze <[log in to unmask]> 
Sent by: TechNet <[log in to unmask]>
02/24/2006 03:40 PM
Please respond to
TechNet E-Mail Forum <[log in to unmask]>; Please respond to
Marcello Brett Malteze <[log in to unmask]>


To
[log in to unmask]
cc

Subject
[TN] Via in Pad x Voids on Solder Process






Hey Team,

 

 

    We are facing some problems regarding voids on Via in Pad on a 10 
layers

board with sequential lamination ( 3 times inside press) on BGA area ,

someone can give me light or share your experience on this?

 

Board Spec:

 

Dielectric 2 x 106 = 90 - 100 µm final

YAG machine

O/L Copper 12 µm

Laser Diameter 130 µm

Surface finish Immersion Tin

 

Sometimes Voids are so big that are creating shorts under BGA.

 

Marcello Brett Malteze 

Mechanical Process Engineering 

Mobile: + 55 11 9468 4833 

Skype: mbrett73 





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