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January 2006

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Subject:
From:
Tom Moore <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Tom Moore <[log in to unmask]>
Date:
Mon, 9 Jan 2006 15:51:11 -0600
Content-Type:
text/plain
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Technetters,
Need your help with an acceptance criteria issue.

Have a SMT board that requires Class 3 acceptance criteria. It has some
FETs with what Figure 7-16 in J-STD -001 calls "Bottom Thermal Plane
Termination" (TO-263s. We are using a heat sink that looks like spider with
the middle section flattened that rests on top of the FET (D2 PAK).
Although the tin/lead pad of the board matches where the heatsink or FET
contact the pad, the screen stencil limits the paste application to
individual dots to prevent the components from floating. The heat sink
manufacturer states that only 50 to 75% of the heat sink needs to contact
the PCB pad for effective thermal conductivity.

The problem is that after reflow no solder is visible on the body or legs
of the heatsink. My inspector is trained to go by Section 5 of 610D which
states that it applies to "soldered connections of all types". However a
bond is definitely there because the heatsink holds even when tugged or
twisted. Is this "good enough" to assure a good thermal and mechanical
connection?

Thank you for your guidance.

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