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January 2006

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Subject:
From:
Lee parker <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Lee parker <[log in to unmask]>
Date:
Wed, 25 Jan 2006 08:56:36 -0500
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Brian

I believe there is a requirement in the Bellcore spec. 

I prefer a note on the drawing that requires one mil clearance between the soldermask and the copper feature. To achieve this the soldermask normally needs to be registered to within three mils of the panel's datum.

Best regards

Lee

J. Lee Parker, Ph.D.
JLP Consultants LLC
804 779 3389 
  ----- Original Message ----- 
  From: Brian Pulis<mailto:[log in to unmask]> 
  To: [log in to unmask]<mailto:[log in to unmask]> 
  Sent: Wednesday, January 25, 2006 7:16 AM
  Subject: [TN] Soldermask Tolerance


  hi all,

  does anyone know if there's a standard which specifies the maximum allowable
  soldermask shift for non-soldermask defined pads.


  regards

  > Brian Pulis
  > Process Engineer
  >
  > Dedicated Micros Malta Ltd.
  > UB2, San Gwann Industrial Estate,
  > SGN 09. MALTA.
  >
  > Tel: (+356)23819 187/199
  >
  > Fax: (+356)23819 100
  >
  >

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