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January 2006

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Subject:
From:
"Russell J. Nicolini" <[log in to unmask]>
Reply To:
(Leadfree Electronics Assembly Forum)
Date:
Wed, 11 Jan 2006 08:57:48 -0800
Content-Type:
text/plain
Parts/Attachments:
text/plain (135 lines)
Chris,

I have attached an image for you to look at.

-----Original Message-----
From: Leadfree [mailto:[log in to unmask]] On Behalf Of James, Chris
Sent: Wednesday, January 11, 2006 7:26 AM
To: [log in to unmask]
Subject: Re: [LF] Land Pattern Question

Being English we only know about T (tea) and have no idea what a Home Base
Plate looks like :)

C

-----Original Message-----
From: Russell J. Nicolini [mailto:[log in to unmask]]
Sent: 11 January 2006 15:23
To: '(Leadfree Electronics Assembly Forum)'; James, Chris
Subject: RE: [LF] Land Pattern Question

Chris

Another good aperture is the "Home Base Plate" which can give you more paste
behind the part, especially useful for those ceramic caps.

Russell Nicolini
Olson Technology Inc.

-----Original Message-----
From: Leadfree [mailto:[log in to unmask]] On Behalf Of James, Chris
Sent: Wednesday, January 11, 2006 1:09 AM
To: [log in to unmask]
Subject: Re: [LF] Land Pattern Question

We have not found any issues using same land patterns as for Pb.

There is some evidence relating to reliability to suggest you should avoid
lands extending under the non contact area of passive chip type parts.

You might want to look at modifying stencil apertures - we get the stencil
bureau to do this based on our standard 1:1 land/stencil layer.
For Pb-F we have been trying "T" cut apertures on passives which seems to
work well (less paste under the contact with more paste behind on the free
land.

Regards,
Chris

-----Original Message-----
From: Leadfree [mailto:[log in to unmask]] On Behalf Of Rick Thompson
Sent: 10 January 2006 23:32
To: [log in to unmask]
Subject: [LF] Land Pattern Question

In reading some forums related to land pattern development and in particular
IPC-7351A, I've seen references to having to develop unique land patterns
for lead free circuit boards based on a particular device manufacturer's
package size.

Is anyone contemplating this as a viable strategy for lead-free PWB layouts?

Thanks for your inputs.


Rick Thompson
Sr. SMT Process Engineer
CTS Electronics Manufacturing Solutions

+1 (805) 532-2800   x-193
[log in to unmask]
www.ctscorp.com



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ext.2815
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