Immediate opening for experience board layout designer 

Location: Xilinx

2100 Logic Drive

San Jose, CA, 95124

 

Responsible for layout of printed circuit boards, at Xilinx 

Required experience 5+ years of PWB layout.

Experience in high pin count BGA's

Be familiar with typical interfaces, such as SDRAM, DDR, DDRII, PCI,
PCI-X.

Be familiar with the aspect of high speed design, such as impedance
control, high speed differential signals, define board stack-up

Must know the following tools

Mentor Graphics Pads layout tool

Cadence Allegro layout tool.

Must know how to use an auto-router

Specctra or Pads Router, Specctra experience is preferred.

Knowledge or experience in Schematic capture is a plus

 

Serious inquiries only

If interested please send resume to 

Patrick Jabbaz

 

 

Patrick Jabbaz
Sr. Hardware Eng.
Xilinx
2100 Logic Drive
Building 1, Floor 2
San Jose, CA, 95124
w: (408) 879-4709
Fax: (408) 377-9013
email: [log in to unmask]

 


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