Best use the silicon datasheet in order to get the actual tab dimensions - MO-220 only gives min/max dimensions which are
extremely wide in order to allow the actual tab to be matched to the die or allow flexibility.
If AD do not give a recommended footprint (no doubt for liability) the best recourse would be assembly house preferences or
IPC-7351.

Allegro footprint attached. No liability accepted!

Best Regards

David Greig
______________________________
GigaDyne Ltd
Buchan House
Carnegie Campus
Dunfermline KY11 8PL
United Kingdom
t: +44 (0)1383 624 975
www.gigadyne.co.uk
______________________________

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Brooks,Bill
Sent: 01 December 2005 20:52
To: [log in to unmask]
Subject: [TN] 56 pin LFCSP footprint

I have an Analog Devices part, 56-lead Lead Frame Chip Scale Package LFCSP with an 8X8mm body CP-56, supposed to be compliant
with JEDEC MO-220-VLLD-2.

Having a tough time locating a recommended footprint for this one...
Any help?

Also any issues with mounting? Since this is a direct to board soldered device, it may be subject to CTE mismatches and the
like... anyone have experience with any soldering or reliability issues with assembling this part to a fiberglass/epoxy board?

Here's a link to the part description
http://www.analog.com/UploadedFiles/Packages/352655155839944545242119821CP_5
6.pdf
<http://www.analog.com/UploadedFiles/Packages/352655155839944545242119821CP_
56.pdf>

Best regards,


Bill Brooks

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