At 02:25 PM 12/19/2005, Valerie St.Cyr wrote:
>Charlie,
>
>My *OWN OPINION* is that there is no value for solder float which will be
>indicative of
>a laminate's ability to withstanding LF assembly in any and all PCBs that
>it might be
>fabricated into. Any temperature used would only be as a reference value.
>A PCB
>which is thin, has only single-sided assembly, and has low additional mass
>from the
>added components, does not need to have a very high solder float
>withstanding
>capability because the LF assembly temperature will be low, relatively
>speaking.

In the little twisted corner of the world I live in, solder floats are an
essential predictor of SMT reflow survival.  Longterm reliability is a
whole 'nother discussion.

This is especially true on our thinner boards. e.g. 8-10 layer stacked uvia
(built up boards) with single ply uVia layers, high buried via and uVia
density, via fill and a high percentage metallization.

We routinely produce designs in excess of 2000 vias/in^2 (>1500 uVias/in ^2
and >200 buried vias/in ^2) on a 1mm thick 8-10 layer.
Who needs a delam test vehicle?  Every build is an adventure.

dw

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