Bill,
This is a punch-singulated QFN package, meeting the JEDEC MOD 220
outline. I will send you an ASAT app note for the package, which include
guidelines for PCB pad layout.
Best regards,
Leo
Leo M. Higgins III, Ph.D.
Vice President Technical Support Operations
ASAT, Inc.
3755 Capital of Texas Highway, Suite 100
Austin, Texas 78704
ph 512-383-4593
fx 512-383-1590
[log in to unmask]
www.asat.com
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-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Brooks,Bill
Sent: Thursday, December 01, 2005 2:52 PM
To: [log in to unmask]
Subject: [TN] 56 pin LFCSP footprint
I have an Analog Devices part, 56-lead Lead Frame Chip Scale Package LFCSP
with an 8X8mm body CP-56, supposed to be compliant with JEDEC MO-220-VLLD-2.
Having a tough time locating a recommended footprint for this one...
Any help?
Also any issues with mounting? Since this is a direct to board soldered
device, it may be subject to CTE mismatches and the like... anyone have
experience with any soldering or reliability issues with assembling this
part to a fiberglass/epoxy board?
Here's a link to the part description
http://www.analog.com/UploadedFiles/Packages/352655155839944545242119821CP_5
6.pdf
<http://www.analog.com/UploadedFiles/Packages/352655155839944545242119821CP_
56.pdf>
Best regards,
Bill Brooks
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