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December 2005

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DesignerCouncil <[log in to unmask]>
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"Mitch S. Morey" <[log in to unmask]>, Designers Council Forum <[log in to unmask]>
Date:
Thu, 8 Dec 2005 17:57:11 -0000
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"(Designers Council Forum)" <[log in to unmask]>, David Greig <[log in to unmask]>
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David Greig <[log in to unmask]>
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An example would be reverse pulse with levellers for microvia, mask off all but PTH and then normal AC or DC for PTH. One way of
getting outer tracks as thin as inner ones. Can't answer the question of whether this would be normal practise for stacked, but
have seen it done that way.

Another is achieving heavy plated copper tracks (>>2oz) but leaving things like small SMT lands masked off. Reflow or wave
depending on how heavy.

Best Regards

David Greig
______________________________
GigaDyne Ltd
Buchan House
Carnegie Campus
Dunfermline KY11 8PL
United Kingdom
t: +44 (0)1383 624 975
www.gigadyne.co.uk
______________________________

-----Original Message-----
From: Mitch S. Morey [mailto:[log in to unmask]]
Sent: 08 December 2005 17:46
To: Designers Council Forum; David Greig
Subject: Re: [DC] Info for routing 0.5mm BGA's

Hi David,

What do you mean by "selective outer layer plating"?

Thanks.

Mitch

>
> Hi Chris
(snip)
> Selective outer layer plating and ~75um tracks for fanout of larger
> parts (might as well have L1-L2 microvia as well) - but this restricts
> the number of fab shops that would take on the job.
>
(snip)


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