Hi TN,

Sorry to raise this again, but I cannot find any firm publication relating to surface flatness and solder joint reliability of
via in pad for small geometries. Doing a lot more HDI and MCM-L these days, so have a keen interest in the topic.

For fabrication cost reasons it is desirable to limit the process stages, which equates to surface plating only and a dimple
left in the pad. For the same reasons, let's assume that the design intent is the place the via in the pad centre, worst place
for outgassing.

Can anyone point to a publication giving empirical evidence of flatness versus joint reliability?
Unfortunately, I'm more interested in Pb free solder...


Best Regards

David Greig
______________________________
GigaDyne Ltd
http://www.gigadyne.co.uk <http://www.gigadyne.co.uk/>  <http://www.gigadyne.co.uk/>
______________________________


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