Hi John,

Can you share some detail of the test board constructions, such as stack up(cores and prepregs) and copper(plane or sparse
conductor and grade of foil)?

I am also wandering if the internal layers are reaching the same peak temperature as the outer layer copper/resin interface and
if the exposure durations are comparable.

This is quite concerning because I regularly design with copper flood on outer layers, more so with HDI and microvia builds
where it helps provide a reference/return path.



Best Regards

David Greig
______________________________
GigaDyne Ltd
Buchan House
Carnegie Campus
Dunfermline KY11 8PL
United Kingdom
t: +44 (0)1383 624 975
www.gigadyne.co.uk
______________________________

-----Original Message-----
From: Leadfree [mailto:[log in to unmask]] On Behalf Of John Burke
Sent: 10 November 2005 19:03
To: [log in to unmask]
Subject: [LF] Delamination on lead free reflow cycling

I have been cycling some bare test boards to the JEDEC 020 spec for lead free reflow trials. I have noticed a tendency for early
de-lamination of areas of the board with copper flood fill on the surface.

This is only occurring after extended cycling, and I have the same effect from 3 different board manufacturers using 3 different
high temperature laminate constructions.

Anyone else noticed this??

John

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