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October 2005

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Subject:
From:
Leo Higgins <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Leo Higgins <[log in to unmask]>
Date:
Wed, 19 Oct 2005 17:01:15 -0700
Content-Type:
text/plain
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text/plain (58 lines)
Hi Werner,
     I was told by some that this delam is not a rejectable criteria per
some industry standards.  While I have not sought out these standards to see
for myself, based upon what you are saying, perhaps my second assessment may
be what we have to live with.  Thanks for the feedback, Werner.



Best regards,
Leo

Director of Applications Engineering
ASAT, Inc.
3755 Capital of Texas Highway, Suite 100
Austin, Texas     78704

ph     512-383-4593
fx      512-383-1590
[log in to unmask]
www.asat.com


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-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Wednesday, October 19, 2005 6:41 PM
To: [log in to unmask]; [log in to unmask]
Subject: Re: [TN] Delamination at Thermal Via area?


Hi Leo,
I am afraid you might be stuck with (2); for 2 reasons.
(1) I do not see 'resin recession' in either via barrel walls [IPC documents
except after soldering processes] ir burried (thermal) vias as a reliability
risk--where is the risk?;
(2) no matter what you do, the adhesion will likely never be enough; you
could fill the filling resin more to get its CTE closer to Cu.

Werner


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