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October 2005

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Subject:
From:
James Hofer <[log in to unmask]>
Reply To:
James Hofer <[log in to unmask]>
Date:
Wed, 5 Oct 2005 15:56:26 -0700
Content-Type:
text/plain
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text/plain (101 lines)
Offer,
If you want the vias capped with soldermask than just call out to fill the
vias prior to Soldermask. If you want to copper plate over the filled vias
than specify that. A good point to specify is how flat or flush with the
surface you desire the via fill to be.
Also note whether you desire Conductive or Non-Conductive fill.

Thanks,

James Hofer
Director of Operations
Accurate Circuit Engineering
3019 S. Kilson Dr.
Santa Ana Ca. 92707-4202
714-546-2162 work
714-473-6127 cell
[log in to unmask]
----- Original Message -----
From: "Jeffrey Bush" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, October 05, 2005 10:22 AM
Subject: Re: [TN] Filled vias


Just state epoxy filling prior to soldermask coat.

Jeffrey Bush
Director, Quality Assurance and Technical Support

VERMONT CIRCUITS INCORPORATED
  76 Technology Drive - POB 1890
    Brattleboro, Vermont 05302
      Voice: 802.257.4571.21 Fax: 802.257.0011
           http://www.vtcircuits.com


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Ofer Cohen
Sent: Wednesday, October 05, 2005 1:07 PM
To: [log in to unmask]
Subject: [TN] Filled vias


Hello, all,
Since the designers (whos vision of the product has a gap starting in
the end of the PCB design until they see the assembled board) placed
capacitors on the fan-out vias of every 1 mm BGA. No need to say that
the vias are through holes, with drill diameter of 0.3 mm (12 mils).
This doesn't leave much hope for the soldering. My solution is to fill
the vias, then cap them.

Can somebody suggest DFM for the PCB design, that will ease the PCB
manufacturer's task? I mean - the minimum common baseline, so maximum
fabricators will be able to deal with it.

Regards

Ofer Cohen
Seabridge - a Siemens company

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