IPC-7912 gives the details on how to calculate the DPMO on assembled printed circuit boards. 

Basically you take the number of defects, divide by the number of opportunities and multiply by 1,000,000. 

There will be different opportunities for solder defects, component defects and other categories. I haven't looked at it recently and I know we don't follow it exactly per the std here. 

For example, for each distinct assembly you have to come up with the number of opportunities for each category. For solder defects, count all of the terminations, and for component defects count all of the components - a resistor will be 1 component with two terminations, while an 8 pin IC will be 1 component with 8 terminations. 

Each assembly will have thus the number of solder opportunities and the number of component opportunities. 

Count the number of defects found for each category in a run of board assemblies. Divide the number of defects by the number of opportunities ( x the number of boards in the run) and multiply by 1,000,000 for the DPMO value for each category. 

Blair Hogg
QA Manager
GAi-Tronics Corp.

>>> [log in to unmask] 08/28/05 11:01AM >>>
Good day to you.
Appreciate if you can share with me on the DPMO calculation in details if
you have it.

rgds
sumxp
----- Original Message -----
From: "Paul Baine" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Friday, August 12, 2005 11:30 PM
Subject: [TN] Calculation of solder defect rates


> Hello all,
>
> I have not used this forum for a few years so I hope I'm doing this
> right.
>
> I have a question re calculation of defect percentages for PCB
> Assemblies.  The old MIL-STD-2000 standard defined a "defect
> rate" as the number of observed defects divided by the "normalizing
> number".  The standard requires calculation of the following:
>
> (1) an Assembly Defect Rate, which is the assembly defects
> divided by the normalizing number, where Normalizing Number is
> (total no. of components, component leads, terminals and wires on
> the
> assembly plus one for the PWB);  and
>
> (2) a Solder Defect Rate, which is the solder defects divided by the
> normalizing number, where Normalizing Number is (total no. of
> terminals plus total no. of solder connections).
>
> I cannot find any guideline in J-STD-001 or IPC-A-610 for
> calculating defect rates.  I am trying to find some non-time-
> consuming method for calculating the Normalizing Numbers.  For
> example, would the Solder Normalizing Number just be the total
> no. of component leads?
>
> I would appreciate some guidance.  Thanks in advance.
>
> Paul Baine


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