John,
The boards are not full body but conventional ENIG (selective). I have
attached two more photos for you to look at. Yes, your observation on the
directionality of the problem is accurate for the samples I have. These two
last pictures unfortunately were taken with the board orientation rotated
180deg so the nonwetting appears to be on the left side of one and the right
of the other. In reality they are on the same side of the board. I make
the further observation that if we assume direction of travel through reflow
being left to right as you view the photos any components that have the body
shadowing the opposite leads, the leading leads seem to be wetted fine
whereas the ones on trailing edge are not. If the component body is
perpendicular to direction of travel then all leads exhibit wetting issues
on the trailing(?) side of the lead.
From what we are told not all boards exhibit the problem and during
troubleshooting they ran two boards separated by about 10 seconds through
the oven and one board was fine the other not (I don't know if the first was
go or the second, possible accounting for insufficient recovery in the oven
although I do not know if this would be the case as the panel is not that
large). They have also tried different solder paste lots with no effect.
John Parsons
_____
From: John Burke [mailto:[log in to unmask]]
Sent: Tuesday, September 13, 2005 3:50 PM
To: 'John Parsons'
Subject: RE: [TN] Wanted: Enig Solderability Troubleshooting Help
Ouch.
A couple of questions.
Is that full body enig (ie enig under resist) or is it the more normal
selective enig (copper under resist)
And excuse my paranoia but that non wetting seems to be directions, always
to the right side of the pads that you sent photographs of - is that in fact
the case?
Let me know the answers by return please.
John
Avanex
John Burke
Senior Manager RoHS Compliance
<mailto:[log in to unmask]> [log in to unmask]
40919 Encyclopedia Circle
Fremont
CA 94538
tel: 510 897 4250
fax: 510 979 0189
mobile: 510 676 6312
<https://www.plaxo.com/add_me?u=4295480015&v0=1019836&k0=1461929701> Add me
to your address book... <http://www.plaxo.com/signature> Want a signature
like this?
-----Original Message-----
From: John Parsons [mailto:[log in to unmask]]
Sent: Tuesday, September 13, 2005 3:43 PM
To: 'John Burke'
Subject: RE: [TN] Wanted: Enig Solderability Troubleshooting Help
John,
Thanks for your offer of assistance. These are screen shots of rather
larger pictures. Not quite the resolution I would like but it seems the
best we can do with our equipment. I could send the originals but they are
about 2.5-3M each.
Regards
John Parsons
_____
From: John Burke [mailto:[log in to unmask]]
Sent: Tuesday, September 13, 2005 3:33 PM
To: 'John Parsons'
Subject: RE: [TN] Wanted: Enig Solderability Troubleshooting Help
John,
I believe on that finish I have seen it all.....................8-)
Please send me the images directly, I would be please dto help if I am able,
John
------------------------------------
Avanex
John Burke
Senior Manager RoHS Compliance
[log in to unmask]
40919 Encyclopedia Circle
Fremont
CA 94538
tel: 510 897 4250
fax: 510 979 0189
mobile: 510 676 6312
------------------------------------
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of John Parsons
Sent: Tuesday, September 13, 2005 3:26 PM
To: [log in to unmask]
Subject: [TN] Wanted: Enig Solderability Troubleshooting Help
We are trying to help a customer resolve a solderability problem they are
seeing on some boards they have received from an off-shore vendor. Prior to
recent batches approx 8-10k boards have been received and assembled without
incident from the same vendor. As a fabricator ourselves we have seen very
little in the way of solderability issues (knock-on-wood) with our ENIG so I
am not sure what steps we should take next.
We have received 4 panels for troubleshooting each with 4 images per. Two
panels exhibit good solderability and two do not. We have measured Au and
Ni using XRF on all panels and results for Ni are in the 200u" range with
gold being just under 2u". I have cc'd Steve on this posting with attached
pictures in hopes that he can post them. Should the boards be sent out for
surface analysis? If so, which labs do such work? A recent thread
mentioned EDS results are not always sufficient and that ToFSIMS is the way
to go. Any insight as to which direction should be taken would be
appreciated.
Regards,
John Parsons
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