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September 2005

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Subject:
From:
"Mcmaster, Michael" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Mcmaster, Michael
Date:
Mon, 12 Sep 2005 16:44:06 -0700
Content-Type:
text/plain
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text/plain (156 lines)
I would bet they were planarized down to the surface initially.  It looks
like the board has HASL surface finish and I would bet the resin in the vias
expanded, pushing out the copper which then stayed there.

Cross section should show whether the copper is still attached to the via
fill.

This is one of the problems of trying to use prepreg resin to fill vias.
The resins meant to fill vias generally give better plating adhesion and
don't show this "bullet hole" appearance.



-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Wenger, George M.
Sent: Monday, September 12, 2005 4:36 PM
To: [log in to unmask]
Subject: Re: [TN] raised vias...

Valerie,

I think I agree with you that the bumps are prepreg and that the
fabricator needs to plane the prepreg back down to the copper level.
However, the problem with doing that is control of the plane operation
so it doesn't remove too much copper and weaken the Layer 1 via knees.
My suggestion to Steve is to cross section some of the raised vias and
examine the integrity of the Layer 1 plating to the blind via barrel
plating.  And I would also repeat the cross sectioning process on
reflowed bare boards after the fabricator eliminates the raise vias to
insure he has good interconnect integrity/reliability.

Regards,
George
George M. Wenger, Andrew Corporation
Reliability / FMA Engineer
Base Station & Subsystems Group
40 Technology Drive, Warren, NJ 07059
(908) 546-4531 [log in to unmask]


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Valerie St.Cyr
Sent: Monday, September 12, 2005 7:18 PM
To: [log in to unmask]
Subject: Re: [TN] raised vias...

Nope .... those vias are filled with prepreg from the lamination cycle.
It
had nowhere to go ... it melts and floods up the hole, capillary action.
The fabricator should have planed the surfaces to bring the prepreg back
down level to the copper layer.

Valerie





stephen gregory <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
09/12/2005 07:02 PM
Please respond to TechNet E-Mail Forum; Please respond to stephen
gregory


        To:     [log in to unmask]
        cc:
        Subject:        Re: [TN] raised vias...


Hi Everyone!

I'm home now, but I can answer some of the questions.

The picture of the board is as it was given to us. It hasn't been
through
reflow...this is how the bare board looks.

The vias aren't filled.This is a 10-layer board that is made from
IPC-4101/26
(GF) material. BUT, there is 5-layers on one side of a .045" thick
copper
core,
and on the other side of the core is the other 5-layers. There is
double-sided
SMT on the board, and both sides have the "anthills" like you see in the
picture.

Pretty strange, huh?

-Steve Gregory-


"Brooks,Bill" <[log in to unmask]> wrote:
I'm just passing the message on... it's Steve's board...

Thanks,

Bill Brooks





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