Everyone has difficulty with 3/3 their first times and not knowing the exact
complexities 50% might even be pretty good; however, there are things you
can do to improve yields such as...

Have you reduced the thickness of the resist and made changes to the etch
process, are you baking resist by any chance? Have you increased speed or
dwell in the etcher? What is the exposure level of the resist? Does it need
to be exposed longer, shorter? Are you using glass tooling for image? How
clean are the panels prior to resist lamination? What are the exact failure
modes? Over-etched? Under-etched? Opens? Shorts? Mousebites or ragged edged
traces.

There are an unlimited number of things that can be done and yes, those
items listed are vague and ambiguous...for a reason...in order for your
company to improve you need to study your specific processes and develop
their potential.

My suggestion is you invite all your materials suppliers in and show them
what you want to do, and ask them to teach you and your team how to
accomplish this.

And good luck

Franklin


-----Original Message-----
From: Avigdor Jakubinsky [mailto:[log in to unmask]]
Sent: Tuesday, August 23, 2005 3:20 PM
To: [log in to unmask]
Subject: [TN] 3mil traces and spaces on CS plane

Hello,

I am having difficulties to get a perfect solid 3mil trace(s) and spaces
for Load-Board. The yields I get is 50% passing PCBs. I would greatly
appreciate knowing what is my best way to get a better yeild.


Avigdor Jakubinsky
System Engineering
ZORAN MICROELECTRONICS LTD.

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