Constantino,

After reviewing the microphotos, and making some "scaled-ruler" measurements to determine some of the physical properties that were not given, I would make the following comments/observations:

This appears to be a 10-layer board approx..061" thick with via holes ~.008-.009" dia.  The laminate material used is indeterminate from the photos.
  
1)The copper plating thickness in the holes--11.4-12.3µm (.0004-.0005") is too thin per IPC-2221 Table 10-2 Class 2 which calls out for 20µm  (.0008") minimum.  For this type of design, most fabrication engineers would specify 37.5µm (.0015") copper plating thickness as the minimum in order to withstand the "Z" stress of assy.

2)  The drilling and etchback (probably permanganate) gives an undesirable topography for subsequent copper plating.  The glass fiber protrusions create high current density areas that tend to nodulate creating some of the "cobblestone" appearance to the copper grain structure.  The "first plating layer" also appears to have been done at too high of an amperage, giving coarse grain structure with "foldovers".  This plating quality would be prone to failure, either from assemble stress or fatigue ductility failure form the thermal cycling (on-off temperature) during use.

3)  There appears to be a laminate crack at the top of layer 7 (24.9 µm) from the PTH barrel, and layer 10 has a 100% "lifted land" on one side of a hole.  This would indicate high Z-axis stress---moisture removal??, laminate type??, etc---so failures reported in this board would be expected.

Dennis J. Cantwell
R & D Liaison
Printed Circuits, Inc.
1200 West 96th Street
Minneapolis, MN 55431-2699
952-888-7900
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-----Original Message-----
From: IPC-600-6012 [mailto:[log in to unmask]] On Behalf Of Constantino J. Gonzalez
Sent: Friday, August 05, 2005 8:55 AM
To: [log in to unmask]
Subject: [IPC-600-6012] Cobblestone" appearance on via wall.

Hello here is Constantino J. Gonzalez from ACME, Inc. - Chairman of
IPC-A-610 Committee and one of my customers had a question. 
Need your assistance on below ... 

boards are failing for boot up / intermittent boot up with certain fallout
rate and Burn-in failures.

Affected location : U6 & U3 ( BGA) sent 2 board to 3rd party lab for a
failure analysis. ( report as attached) 

-As you can see  the solder joints looks  good. 
-There was no evidence of black pad . 
- Double plating on via hole with "cobblestone" appearance on the 1st
plating. 
-CU Wicking 

I wondering why the hole wall structure has "Cobblestone" appearance? 
Is this acceptable ?? 
We are unable to perform plating analysis as we don't have any more raw
cards. 
Can Cu wicking, lead to boot up failure?? 
Is there any other analysis that can be perform ?? 

What is your opinion ?? 
Appreciate your help. 

 

ACME F

 

Regards from your,

Official IPC MASTER INSTRUCTOR

 

Constantino J. González

President / Consultant Engineer

IPC-A-610 Committee Chairman

 

ACME, Inc.

AMERICAN-HISPANIC COMPANY

513 CLEVELAND STREET

RAPID CITY, SOUTH DAKOTA 57701

USA

E-mail: [log in to unmask]

Phone: 605-381-5963

Fax:    605-341-4261