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July 2005

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Subject:
From:
"Croslin, Robert" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Croslin, Robert
Date:
Fri, 29 Jul 2005 12:02:16 -0400
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text/plain (99 lines)
Ken, what type of design system do you use?  Hopefully, it integrates
the schematic capture with the PCB layout tools so you can verify them.
Does your engineer either approve the schematic or generate it
themselves?  Are your library shapes verified?  We make very few layout
errors here at Nielsen, but almost all of them are library related.  If
you don't feel comfortable checking them, get a technician or someone
else to verify them. For the footprint part, make sure you verify that
with your assembly people.   A couple of others have advised you to
check your placement with your assembly people and to use their design
guidelines and that's great advice.  

Did any of the problems come from the PCB construction?  There are
several tools for verifying the stackup and you need to discuss it with
the fabricator.  Your circuit design engineer should also participate in
those discussions.  One of the best sources for getting up to speed is
to attend conferences like PCB West/East.  The cost of a week at the
conference is less than one spin of an 8 layer board and the amount you
will learn is amazing.


Bob Croslin
Nielsen Media Research

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Ken McGee
Sent: Friday, July 29, 2005 11:09 AM
To: [log in to unmask]
Subject: [TN] design verification

Hi Folks,



2 years ago my boss gave me the task of learning board layout.  It's
something I wanted to learn to do, but have been frustrated on the lack
of resources available.



Over the past 2 years I've managed to learn quite a bit, and each layout
I do is progressively more complicated.  The last board I worked on, was
a very dense 8 layer board, with several .8 mm BGAs.  The board is up
and running, but there were several mistakes on it, and will have to be
turned.
I've been trying to think of ways to check and recheck my designs and I
wanted to find out what others do to verify the work they've done.



Thanks for any input.







Kenneth McGee, C.I.D.

Engineering Technician

Cyberoptics Semiconductor, Inc.

P.O. Box 276

Beaverton, OR  97076



503-495-2200

503-495-2201 (fax)




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