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July 2005

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Subject:
From:
Barry Gallegos <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Barry Gallegos <[log in to unmask]>
Date:
Fri, 29 Jul 2005 09:27:19 -0600
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Doesn't MoonMan have a pretty good book about this ?

Barry



-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Kerry McMullen
Sent: Friday, July 29, 2005 9:23 AM
To: [log in to unmask]
Subject: Re: [TN] design verification


Hi Ken,
Most fab houses have very good DFM guidelines for board layout on their
websites.  It is a good place to start.  Also, including your CM in the
design will give you a good set of eyes to help you review the layout
prior to fab to catch any assembly issues.





Ken McGee <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
07/29/2005 11:09 AM
Please respond to
TechNet E-Mail Forum <[log in to unmask]>; Please respond to
Ken McGee <[log in to unmask]>


To
[log in to unmask]
cc

Subject
[TN] design verification






Hi Folks,



2 years ago my boss gave me the task of learning board layout.  It's
something I wanted to learn to do, but have been frustrated on the lack of
resources available.



Over the past 2 years I've managed to learn quite a bit, and each layout I
do is progressively more complicated.  The last board I worked on, was a
very dense 8 layer board, with several .8 mm BGAs.  The board is up and
running, but there were several mistakes on it, and will have to be
turned.
I've been trying to think of ways to check and recheck my designs and I
wanted to find out what others do to verify the work they've done.



Thanks for any input.







Kenneth McGee, C.I.D.

Engineering Technician

Cyberoptics Semiconductor, Inc.

P.O. Box 276

Beaverton, OR  97076



503-495-2200

503-495-2201 (fax)




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