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July 2005

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Subject:
From:
Graham Collins <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Graham Collins <[log in to unmask]>
Date:
Fri, 29 Jul 2005 11:29:44 -0400
Content-Type:
text/plain
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text/plain (95 lines)
Hi Ken
Well, from the other side of the process (I'm an assembly guy), I have
always encouraged the designers to get the design reviewed by the people
who will be building it before the layout is set in stone.  We may
notice things that you won't, and this has saved us some "oh #$#!!"
moments.

regards,

Graham Collins
Process Engineer,
L-3 Communications Electronic Systems Inc.
Halifax
(902) 873-2000 ext 6215

>>> [log in to unmask] 07/29/05 12:09PM >>>
Hi Folks,



2 years ago my boss gave me the task of learning board layout.  It's
something I wanted to learn to do, but have been frustrated on the lack
of
resources available.



Over the past 2 years I've managed to learn quite a bit, and each
layout I
do is progressively more complicated.  The last board I worked on, was
a
very dense 8 layer board, with several .8 mm BGAs.  The board is up
and
running, but there were several mistakes on it, and will have to be
turned.
I've been trying to think of ways to check and recheck my designs and
I
wanted to find out what others do to verify the work they've done.



Thanks for any input.







Kenneth McGee, C.I.D.

Engineering Technician

Cyberoptics Semiconductor, Inc.

P.O. Box 276

Beaverton, OR  97076



503-495-2200

503-495-2201 (fax)




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