My last employer had some very good preocesses in place that kept CAD problems to a minimum. I'll try to keep it brief-could really get in depth with this one.
First they wrote down the process to be followed and there were design guidelines made that the Assembly group came up with that we followed (there were always exceptions but you tried to accomodate first). If you have DFT, the schematic should have been reviewed by DFT and extra parts/testpoints incorporated.
Feedback from previous revisions would be solicited from Assembly, EE and ME. Before boards were started, the parts were created and checked by: Assembly group & another designer minimum. Sometimes parts were checked by EE or ME as well if they were special parts or connectors. If you don't have a good library process in place-At a minimum, you'll need to have someone check over all the newly made parts before the board goes for fab.
We would have a placement check done by ME, EE and Assembly after parts were placed but before routing.
(We would be able to continue working on the board as placement is being checked)
Final check on board file by another designer, ME, EE and Assembly group rep (also DFT group if applicable).
Also gerbers would be reviewed by another designer.
We had checklists of things to review for each of these steps so we wouldn't forget to check something.
Checklists would have things on it like:
Global fiducials present
Local fiducials on all xx pitch or less parts
Large/heavy parts all located on one side of pcb
parts are XX distance away from board edge.
Connectivity check performed-no errors
Clearance rules check performed
Check board to schematic ascii
etc
Although this seems like something that is time consuming, it really wasn't once everyone was on board as to the priority of the checking process.
Any questions, feel free to call.
HTH,
Denise Michaloski, C.I.D.
Windermere ITS
443-716-2510
[log in to unmask]
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Ken McGee
Sent: Friday, July 29, 2005 11:09 AM
To: [log in to unmask]
Subject: [TN] design verification
Hi Folks,
2 years ago my boss gave me the task of learning board layout. It's
something I wanted to learn to do, but have been frustrated on the lack of
resources available.
Over the past 2 years I've managed to learn quite a bit, and each layout I
do is progressively more complicated. The last board I worked on, was a
very dense 8 layer board, with several .8 mm BGAs. The board is up and
running, but there were several mistakes on it, and will have to be turned.
I've been trying to think of ways to check and recheck my designs and I
wanted to find out what others do to verify the work they've done.
Thanks for any input.
Kenneth McGee, C.I.D.
Engineering Technician
Cyberoptics Semiconductor, Inc.
P.O. Box 276
Beaverton, OR 97076
503-495-2200
503-495-2201 (fax)
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