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July 2005

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Subject:
From:
Lance Mayes <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Lance Mayes <[log in to unmask]>
Date:
Fri, 15 Jul 2005 07:32:16 -0600
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Good morning Mary "J",
In response to your question we could go to J-STD-001, 9.2.5.1. This
refers you to table 9-1, however to be more clearly understood you can
look at the cut away in fig.3.  Through the barrel of the board the
circumferential wetting has to be 270 deg. voids or pin holes would cause
this to be considered "minimum acceptable condition class 1, 2.  The 270
deg pertains to the solder source side of the lead and barrel, if you have
a desk reference manual DRM-40, you will be able to see more quickly to
make your decision.
IPC-A-610D, 7.5.5.4, fig.7-118 gives a very clear example and so will
7.5.5.2 show examples of the primary side acceptable standards.  It sounds
like a possibility of the lead size and maybe clinch configuration of the
component.

I'm sure you will be getting quite a few responses from the great Guru's,
They have far more knowledge of these incidents.  Hope this helps in so
small way.

Have a blessed day.

                        P.  Lance Mayes CIT

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