The main verification from design should be a CAD net that is compared to the net derived from the data sent to fabricate the boards. Once the derived net is known to be good, this should be the net used to further compare the data after DRC/DFM and also for electrical verification. Flying probe will also verify boards similar to bed of nails is the program is developed correctly from the derived net.
ODB++ has a net as part of the data container - we can extract a netlist at any part of the process and this is stored in the ODB++ container and can be referenced at anytime. This is one advantage of ODB++ - Downstream has a CAM350 product that can read both Gerber and ODB++, among other formats.
Jeffrey Bush
Director, Quality Assurance and Technical Support
VERMONT CIRCUITS INCORPORATED
76 Technology Drive - POB 1890
Brattleboro, Vermont 05302
Voice: 802.257.4571.21 Fax: 802.257.0011
http://www.vtcircuits.com
-----Original Message-----
From: Roland Jaquet [mailto:[log in to unmask]]
Sent: Tuesday, May 24, 2005 12:12 PM
To: [log in to unmask]
Subject: [TN] IPC-D-356 A/B
Dear Technetters,
I am back with an old problem ..
"Are the produced PCB's identical to my Design?"
If I send the D-356 file to the PCB Manufacturer, what does prove me it is
matching the production AND the Electrical Test ????
Further more, if tested with a Flying Probes Tester ?
They test proximity nets, and eventually more, but never all against one and
each one.. What is the reliability confidence in this case?
Once the D-356 sent.. who care ? Which feedback do we have??
So is there any practiced way of controlling 100% matching?
Is someone asking for it?
1 - Could the CAM generated netlists be sent to the Designer and compared to
D-356 ?
2 - Can the CAM output a printed list describing the number of each net
length ?
3 - Can the D-356 generate a printed list describing the number of each net
length ?
4 - Can the Flying Probes machine (ManiaBarco, ECT / ATG, ...) Generate the
number of each net length ?
5 - Is there a software capable to compare each one and show the
differences?
6 - I remember our Mania Bed of nails, E.T. was capable to print the netlist
he was testing. Which depends of the effectively used bed of nails.. which
should correspond to the CAM and Design as well.. but for some reason we do
not even know if all the nails are in place to run the test..
7 - How all the above is handled in ODB++ Up + Down stream??
I would be pleased if someone could tell me how they proceed when they need
100% reliability from Design to Assy.. In case where we are manufacturing in
IPC Class 3, IPC-60xx, IPC-32xxx...
Thank you
Very Best regards
Rol@nd
www.PCBspecialist.com
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