Why not do a cross section? I think this will afford many other information.
Maybe is the solderability problem of the leads; 240 degree maybe not enough for the wave soldering, do you know the exactly temp of solder joints? also how about the thickness of the board ?
The gold maybe is another reason, too thin or too thicker will cause the similar problem.
Sometimes we can find the gold layer left in the solder joint without enough heat.
************************************************************
Dr. Liu Sang
Process Technology Section of Manufacture Technologies Center
Huawei Technologies Company, LTD.
Bantian, Longgang,
Shenzhen 518129 P.R.China
Tel: (86)-755-89651102, Fax: (86)-755-89651064
E-mail: [log in to unmask]
http://www.huawei.com
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----- Original Message -----
From: "Joyce Koo" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Tuesday, May 10, 2005 5:27 AM
Subject: Re: [TN] Suggested failure analysis technique?
> sounds might be insufficient heat. The ground may sink more heat than the
> other pin upon reflow. either it is a lousy design or you might want to
> change profile to get complete reflow of the ground pin....Large board?
> make sure you do not over reflow the other components if you want to put
> more heat.... (someone may not do a DFM well)...
> jk
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of John Burke
> Sent: Monday, May 09, 2005 5:23 PM
> To: [log in to unmask]
> Subject: Re: [TN] Suggested failure analysis technique?
>
>
> What is over the top of the nickel??
>
> You can't be soldering straight to nickel.............it will be oxidised.
>
> John
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Cheryl Tulkoff
> Sent: Monday, May 09, 2005 2:11 PM
> To: [log in to unmask]
> Subject: Re: [TN] Suggested failure analysis technique?
>
>
> Board finish is Cu with OSP. The cracks only show up on the ground pins and
> not the signal pin. I'd only get an electrical fail if the center joint
> cracked completely.
>
> Thanks,
> Cheryl Tulkoff
> Phone:(512) 683-8586
> Fax: (512) 683-8847
> National Instruments
> 11500 N. Mopac Expressway
> Building A
> Austin, TX 78759-3504
>
>
>
>
>
> Vladimir Igoshev
> <[log in to unmask]
> > To
> Sent by: TechNet [log in to unmask]
> <[log in to unmask]> cc
>
> Subject
> 05/09/2005 03:56 Re: [TN] Suggested failure analysis
> PM technique?
>
>
> Please respond to
> TechNet E-Mail
> Forum
> <[log in to unmask]>
> ; Please respond
> to
> Vladimir Igoshev
> <[log in to unmask]
> >
>
>
>
>
>
>
> Hi Cheryl,
>
> Unfortunately, it doesn't seem to exist. Particularly with hairline cracks
> where electrical contact could be present. What is the finish on your
> boards?
>
> Regards,
>
> Vladimir
>
> Vladimir Igoshev, Ph. D.
> Senior Materials Researcher
> Research in Motion
> 451 Phillip St.
> Waterloo, ON, N2L 3X2
>
> Voice: (+1) 519-888-7465, ext. 5283
> Fax: (+1) 519-886-0863
> E-mail: [log in to unmask]
>
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Cheryl Tulkoff
> Sent: Monday, May 09, 2005 4:46 PM
> To: [log in to unmask]
> Subject: [TN] Suggested failure analysis technique?
>
>
> I have a large lot of circuit boards where about 20% have small, hairline
> solder fractures around some wave soldered PTH connector joints. We're
> working on root cause analysis to prevent it from happening and repairing
> the boards which have failed inspection. But, we're tying to figure out
> what to do with the boards that have passed the inspection but may be at
> risk. Quick and dirty tests have been unable to create fractures on these
> joints and they pass visual criteria. Are there any quantitative tests
> that could be performed on a sample to verify solder joint integrity? We
> don't hae any historical data for comparison.
>
> Thanks! Cheryl
>
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