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May 2005

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Subject:
From:
"Blair K. Hogg" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Blair K. Hogg
Date:
Fri, 6 May 2005 13:06:39 -0700
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Can the SM defined pads and the copper defined pads be a significant contributor? From what little I know, it sounds like the paste on the SM defined pad will melt last because the heat will be conducted away by the copper, where the copper defined pad has little copper to conduct heat away, but then again, wouldn't all of the copper reach the same temperature during the ramp-up? What would make the copper defined pad heat up more quickly?
 
If the SM defined pad was changed to a copper defined pad, with a trace to the surrounding ground plane, would that help? Or would the ground plane still affect the temperature of the pad adversely?
 
One question you could ask is whether the tombstones are all in one direction (e.g., the paste melts first on the copper defined pad, then on the SM defined pad, and thus the surface tension of the molten solder causes the part to tombstone onto the copper defined pad (off the SM defined pad). If all of the components are behaving the same way, isolating the SM defined pads with an open area of no copper may help.
 
Blair Hogg
QA Manager
GAI-Tronics Corp.

>>> [log in to unmask] 05/06/05 01:05PM >>>
This question is for Assembly Process Engineering types.

Our designs are suffering from 0402 tombstoning.
The best feedback I am receiving from our Asian CM is this is caused by footprints.
As I am a Designer and not a Process Engineer I have been tasked with asking some experts.
So, here we go:

We are in the process of redesigning some PCBs that use 0402 chip parts (Rs and Cs).
Our CM is requesting we deviate from our IPC-782 footprints.
At present IPC782 and 7351 both recommended .016" gap between lands.
Our CM is requesting reduction to .012"

Comments?


Also, we use flooded ground pours due to RF performance and there fore end up with unequal land sizes (one copper defined pad and one soldermask defined pad +.004 in X and Y size) depending on device connections.
What would be your concerns over this design style?
Do we need to equalize land sizes at the cost of time in design (literally thousands of parts per board) or can this be relatively compensated for with assembly process (paste, profile, fixturing, etc.)?


Any help is appreciated
Thanks,
FNK


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