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April 2005

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Subject:
From:
Linda Langley <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Linda Langley <[log in to unmask]>
Date:
Fri, 8 Apr 2005 11:45:06 -0400
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IPC - 610, page 12-86

Linda Langley
Training Specialist
Jabil Circuit Inc.
Auburn Hills, Michigan
(248) 292-6176 

CONFIDENTIALITY NOTICE: The information contained in this electronic communication, including any attachments, is confidential information, is intended only for the use of the recipients named above, and may be legally privileged. If the reader of this message is not an intended recipient, you are hereby notified that any review, use, dissemination, distribution or copying of this communication, or any of its contents, is strictly prohibited. If you have received this communication in error, please notify us immediately of the error by return e-mail and please permanently remove the original message and any copy of it from your system. Nothing herein is intended to constitute an electronic signature or consent. Thank you



-----Original Message-----
From: TechNet [mailto:[log in to unmask]]
Sent: Friday, April 08, 2005 10:53 AM
To: [log in to unmask]
Subject: [TN] SMT solder joints / % voids allowed


Hi T'Netter's;

I'm trying to track down specific numbers regarding the maximum allowable
percentage of voids in a Surface Mount solder joint.
I'm not looking for the BGA criteria, but what is allowed for the
"standard" SMT components.
Looking through IPC-A-610D, I can't seem to identify any specific sections
yet.

Any and all help is appreciated.
TIA.
Reards,
Rob

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