assuming no latent defects: circumferential cracking near the middle of the
via is most likely in my experience.
first going resistive on high temp excursion (via in tension pulling crack
open as Cu work hardens/grains elongate)
ultimately going resistive and then open even at room temp

dw


At 12:40 PM 2/1/2005, you wrote:
>Thin copper plating, poor ductility of plating deposit, under cured
>resin system - to name a few.
>
>Jeffrey Bush
>Director, Quality Assurance and Technical Support
>
>VERMONT CIRCUITS INCORPORATED
>   76 Technology Drive - POB 1890
>     Brattleboro, Vermont 05302
>       Voice: 802.257.4571.21 Fax: 802.257.0011
>            http://www.vtcircuits.com
>
>
>-----Original Message-----
>From: Richard Kraszewski [mailto:[log in to unmask]]
>Sent: Tuesday, February 01, 2005 3:05 PM
>To: [log in to unmask]
>Subject: [TN] Behavior of Via's in low temperature cycling
>
>I have a 6 layer board with a 10-mil standard through hole (not micro)
>via.
>
>Trying to understand what type of stresses 7 factors  would drive
>failure of this via at cycling from -40degC to 125degC with normal FR4.
>
>Any thoughts or sources of references would be appreciated.
>
>Thanks.
>
>Rich K / KEDS
>
>
>
>
>
>
>
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