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February 2005

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Subject:
From:
David Greig <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Mon, 7 Feb 2005 21:05:54 -0000
Content-Type:
text/plain
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text/plain (80 lines)
Hi Gary

Plus points for QFN:

Excellent heat transfer thru  thermal via's on paddle pad
Low package inductance - great for high speed(100MHz - several GHz) and RF
Small!
Reflow well


Downs:

CTE issues if board materials are much away from FR4 ~16ppm (thermount and
Rogers for example)
Need care on solder paste stencil design - refer to apps notes from Amkor
etc.
No way of cleaning under the package (CFC's and/or high pressure jets (10's
of bar) might just do it!)
Difficult to rework
Harder to inspect
Need tented vias if on both sides


If space, speed or power dissipation are not an issue then the TSSOP would
be sensible, so long as the TSSOP is going to remain available!

Best Regards

David Greig
______________________________
GigaDyne Ltd
Buchan House
Carnegie Campus
Dunfermline KY11 8PL
United Kingdom
t: +44 (0)1383 624 975
______________________________

-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of
[log in to unmask]
Sent: 07 February 2005 19:22
To: [log in to unmask]
Subject: [DC] HVQFN packages

Hi All

I have an engineer that is specifting some parts from Philips in a HVQFN, no
lead package. Are there any assembly issues with these packages? Do work
with standard manufacturing processes? If we are not really cramped for real
estate should we use TSSOP?

Thanks


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Gary
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