Hi Greg! Take a look in the JSTD-001 Handbook for a very good explanation
of the gold embrittlement issue. There are a couple of "rules of thumb"
that can keep you out of trouble the majority of the time - for plated thru
hole components keep the gold thickness at 100 uinch maximum and for SMT
components keep the gold thickness at 50 uinch maximum. Of course those
gold thickness maximums need to also take into account the amount of gold
on your pwb. ENIG surface finishes are so thin they contribute little to
the overall gold thickness  but an electrolytic gold finishes can be plated
to various thicknesses.
The microstructural phase that is the bad player is AuSn4 which forms when
the gold content in the solder joint is approximately 3-3.5 weight % and is
very brittle. Also take a look back at the TechNet Archives - there should
be several good gold embrittlement discussion threads.  The simple answer
for you student is: Yes, the gold thickness on the pwb also contributes to
possible gold embrittlement issues and may require pretinning depending on
the thickness of gold present.

Dave Hillman
Rockwell Collins
[log in to unmask]





Dear TechNetters,

One of my students has a good question, I can't answer. J-STD-001
requires gold removal of various gold plated components/terminals. What
if you are using a gold plated board plating. Is there generally any
problems with gold embrittlement with this type of board plating with
non-gold plated leads for through-hole or SMT components?

Your thoughts would be most appreciated.

Gregg A. Owens
Manufacturing Technology Training Center, Inc.
Mira Loma, CA 91752 USA

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