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Subject:
From:
Leo Higgins <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Leo Higgins <[log in to unmask]>
Date:
Mon, 6 Dec 2004 09:47:48 -0800
Content-Type:
text/plain
Parts/Attachments:
text/plain (263 lines)
The dimensions and dimensioning generally follow the JEDEC approved outline
and procedures.  I am sure specific dimensions could be provided to you from
the supplier of the packaged device.


Best regards,
Leo

Director of Applications Engineering
ASAT, Inc.
3755 Capital of Texas Highway, Suite 100
Austin, Texas     78704

ph     512-383-4593
fx      512-383-1590
[log in to unmask]
www.asat.com


The information contained in this electronic message is CUSTOMER/SUPPLIER
PRIVILEGED AND CONFIDENTIAL INFORMATION intended only for the use of the
individual or entity named above. If the reader of this message is not the
intended recipient, you are hereby notified that any dissemination,
distribution and copying of this communication is strictly prohibited. If
you have received this communication in error, please immediately notify the
sender by electronic mail. Thank you.



-----Original Message-----
From: David Greig [mailto:[log in to unmask]]
Sent: Monday, December 06, 2004 11:21 AM
To: 'TechNet E-Mail Forum'; 'Leo Higgins'
Subject: RE: [TN] Help, Help, I have a QFN Package I don't know what to
do !


Hi Leo,

One request regarding QFN's (and this is not singularly directed at ASAT) -
could the package drawings please dimension the lead terminals relative to
the thermal pad?

Invariably these are with respect to the outer body, and with LMC/MMC
conditions can overlap the thermal pad, or at least leave insufficient
clearance.
Given the methods of singulation, it would be preferable to use the thermal
pad as the reference for the other dimensions.

Best Regards

David Greig
______________________________
GigaDyne Ltd
Buchan House
Carnegie Campus
Dunfermline KY11 8PL
United Kingdom
t: +44 (0)1383 624 975
______________________________


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Leo Higgins
Sent: 06 December 2004 16:51
To: [log in to unmask]
Subject: Re: [TN] Help, Help, I have a QFN Package I don't know what to do !

After a quick review of QFN design differences, I will get to the perimeter
solder joint issue.

There are several 'flavors' of QFNs.  Some QFN leadframes are designed
placing the units very close together, providing very high leadframe
utilization.  These QFNs are molded in large area blocks with many
individual die assemblies embedded in each molded block.  There may be 2 - 5
molded blocks measuring approximately 50x50mm to 70x120mm on each leadframe
strip.  In another design, the QFNs are spaced farther apart on the
leadframe strip and each QFN is molded in its own cavity in the large
molding tools.  The block molded units are singulated after leadframe
plating with a diamond dicing saw, while the individually molded units are
singulated with punch tooling.  The sawn parts have sharp square edges.  The
individually molded units have tapered sidewalls and a small protrusion from
the base of the part around the package perimeter.  With the former, you can
see no contacts when viewed from the top, while with the latter you can see
the top sides of the individual contacts around the package perimeter.

A further variation in the package design relates to the way the leadframe
is etched.  It is common to etch 1/2 of the leadframe thickness from the
bottom (contact side) in several locations on the leadframe.  This is done
around the perimeter of the die attach paddle to increase the separation
distance between the edge of the exposed DAP backside and the contact pads
while maintaining maximum DAP size on the top surface for die attach and
possible wire bond down-bonding around the DAP perimeter.  Another area that
is 'half-etched' is in the region where the leadframe exits the edge of the
package.  If the full leadframe thickness is maintained at the site where
singulation will occur, the diamond saw must cut through the full 200
micrometer Cu leadframe thickness, or the punch tool must cut through full
thickness.  This causes more rapid saw blade wear and can cause higher
stress on the edge of the package during punch singulation.

If the full leadframe thickness is maintained, a small solder fillet may
form up the thickness of the leadframe if the flux is active enough and the
QFNs are not old and heavily oxidized on the exposed copper surface.  If the
leadframe is half etched in this perimeter region, the bottom surface
contact pad will not reach the edge of the package, so no fillet will form.
Both designs have been proven very reliable since the large exposed DAP is
generally soldered to the PCB during board assembly, relieving much of the
temp cycle induced stress in the contact pads.

If you do not design the thermal pad on the PCB properly, during SMT the
solder on the PCB thermal pad will melt, and wet the exposed backside of the
QFN DAP, and problems may result.  The wetting of the DAP will pull the
package close to the PCB surface.  If the amount of solder on the PCB
thermal pad is too small, the solder surface tension/wetting will pull the
package down and can squeeze the contact pad solder forcing a blob of solder
to protrude from the joint, even when the leadframe has been half-etched on
the perimeter.  This blob can go inward and short to the thermal pad or
outward where you can see it as a 'solder bubble".  If the solder on the PCB
thermal pad is too great, during reflow the package can 'float' and cause
opens on a package edge.

Hope this helps.


Best regards,
Leo

Director of Applications Engineering
ASAT, Inc.
3755 Capital of Texas Highway, Suite 100
Austin, Texas     78704

ph     512-383-4593
fx      512-383-1590
[log in to unmask]
www.asat.com


The information contained in this electronic message is CUSTOMER/SUPPLIER
PRIVILEGED AND CONFIDENTIAL INFORMATION intended only for the use of the
individual or entity named above. If the reader of this message is not the
intended recipient, you are hereby notified that any dissemination,
distribution and copying of this communication is strictly prohibited. If
you have received this communication in error, please immediately notify the
sender by electronic mail. Thank you.



-----Original Message-----
From: Ingemar Hernefjord (KC/EMW)
[mailto:[log in to unmask]]
Sent: Monday, December 06, 2004 4:01 AM
To: [log in to unmask]
Subject: Re: [TN] Help, Help, I have a QFN Package I don't know what to do !


Kevin,

Make a shear test and see what's up. If the component has at least some 100
N/mm2 per
'leg', then the solder may not be so bad. If there is a real bad joint, I'd
look for dewetting, which is far from rare today, when the component makers
try to lower the processing costs.

My two centimos

Ingemar Hernefjord
Ericsson Microwave Systems



-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Kevin Jaworenko
Sent: den 1 december 2004 15:44
To: [log in to unmask]
Subject: [TN] Help, Help, I have a QFN Package I don't know what to do!


G'day Everyone.

        Well as the subject states we are currently running a prototype
assembly with a new package style to me, a QFN (Quad Flat No-lead). I had to
look that one up myself.

        The problem is when we were trying to reflow the part, the solder
joint looks very poor, with little to no solder seen on the edge of the
component lead and the pad on the PCB, or a bubble of solder seen on end of
the component between the edge of the component lead and the pad of the PCB.

        I'm currently setting up to X-ray the components to see if the foot
actually has a good solder joint underneath the component, where the lead
has been curled around the component, but has anyone else had any dealings
with this particular component type before and would be willing to share?

        I looked up the component manufacture's website and they show that
this component has a required peak temperature of 235 (+5/-0) degrees C.
That seems like a lot of heat for a non lead-free component.

        Feel free to email me offline if anyone likes.

Thanks in advance.

Kevin Jaworenko
Manufacturing Engineering Technologist
Vansco Electronics LP
(204) 453 - 3339 ext. 622
(204) 453 - 3663 FAX
[log in to unmask]


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