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November 2004

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Subject:
From:
Franklin D Asbell <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Franklin D Asbell <[log in to unmask]>
Date:
Fri, 19 Nov 2004 12:31:02 -0600
Content-Type:
text/plain
Parts/Attachments:
text/plain (68 lines)
What you are observing is a thin coating of solder mask. As the thickness
decreases the color of copper is more visible making it "appear" as though
it is not covered. Coverage is evident in that it will not accept solder.

As for testing those points, if you 'stick' it with a test probe you are
most likely penetrating the solder mask coating...

This not an uncommon condition (visually) for tented vias. This is not a
defect unless you provide specific criteria to the board shop stating this
is not acceptable.

Franklin






----- Original Message -----
From: "Chellis, Tammy" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Friday, November 19, 2004 11:33 AM
Subject: [TN]


> We do incoming inspections on the PCB and we are having troubles with
> identifying if variations in the LPI layer is acceptable. We are having a
> problem with coverage on the Vias. I
> have a customer who specifies the vias are plugged and tented. I am
> getting
> boards with a copper color at some of the vias. I have tried to solder and
> it
> will not take the solder but using a DMM the via is not electrically
> isolated. I am not sure if this is a problem or not. Is a board in IPC
> compliance
> with out electrical isolation of a plugged and tented via?
> The tenting is to be done with the LPI layer and appears to be very thin
> on some vias. We are not trying to solder to them I just tiring to find
> out
> if it is a defect. The thing that does not make sense to me is the
> conductivity to the via.
>
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