Rich,
Tombstoning is caused by excessive surface tension forces on the ends of
chip components. Surface tension of liquid solder is due to the volume of
that solder and is a function of pad design and stencil apertures. There
have been a number of papers written on this subject including some I wrote
more than a decade ago but to distill it down to first order effects only
we find;
1) Too much solder
2) Pads are too wide leading to too much solder
3) Pads are too long leading to too much solder
4) Pad separation is too large resulting in asymmetrical surface tension
forces during reflow
5) Aperture in stencil is not designed to control volume of solder paste
during deposition resulting in too much solder
6) Thickness of stencil is not specified to control volume of solder paste
resulting in too much solder
7) Solder mask between pads is above base metal surface acting as a fulcrum
during reflow

That should cover it in a nutshell. Yes there are numerous other
contributing factors but fix the big problem first (TOO MUCH SOLDER) and
then focus on second order defect sources. Unfortunately we as a group tend
to like large solder joints that can be inspected by using the touch and
feel technique. Those solder joints do not improve reliability and are
troublesome especially when we move to smaller case sizes due to
dramatically increased production defects.

John Maxwell

At 05:24 PM 10/22/2004 -0500, you wrote:
>I'm looking for the all around best documentation on tombstoning causes
>& cures.
>
>Any opinions?
>
>Rich K / KEDS
>
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