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October 2004

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Subject:
From:
"Fineline Circuits, Inc." <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Fineline Circuits, Inc.
Date:
Tue, 12 Oct 2004 10:59:24 -0400
Content-Type:
text/plain
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text/plain (25 lines)
I would like to know how to accomplish burr free plated castellation tab
routing and or scoring.
We are seeing plating slivers coming off during masking. Our process is
drill, electroless, tab route array, copper flash, image , second plate
copper and tinlead, etch, mask and route array. The design is such that
copper extends all the way to the edge of the board. Tab routing after
electroless we see a burr free edge but after strike and second plate, the
copper foil on the edge gets overplated and when we go to mask we run into
sliver  problems. Even if we recess the copper a bit from the edge of the
board (5mls) than  in imaging we are having problems for the 5ml laminar to
adhere to the edge of the board after developing.
Material is FR4.
Appreciate your input.
Sona Sitapara

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