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October 2004

EmbeddedNet@IPC.ORG

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Subject:
From:
Alexandra Curtis <[log in to unmask]>
Reply To:
D-37 Sub-Committee Forum <[log in to unmask]>, Alexandra Curtis <[log in to unmask]>
Date:
Mon, 18 Oct 2004 16:20:42 -0500
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Design and Process Implementation for Embedded Passive Components Technology
November 15-16, 2004 * Hosted by Coretec, Inc.
Scarborough, Ontario, Canada

Embedded passive components have been available for many years even though the market for them has been very small.  Now, with the advent of wireless technology and high speed/high frequency circuits, they are paramount to moving technology forward. 
Achieving significant real estate savings and excellent performance of the electronic module require that the resistor and capacitor devices are close to the power I/Os of the semiconductor. Embedded passive technology fulfills that requirement.

This two day workshop is designed for individuals who are implementing embedded passive components technology and want to improve performance and reduce the costs of electronic products. 
This course will provide understanding and know-how for those involved in design and manufacturing process implementation. Risk assessment and trade-offs of embedded passive technology and its integral involvement in the interconnect substrate will be also covered. 

You will also learn about conditions that prevail in the materials and assembly processes that impact the entire product performance. The difference between integrated and embedded passive components will be explained. Find out practical solutions on how to handle embedded passive technology in the mounting structure. 

For more information or to register, please go to http://www.ipc.org/calendar/DesignforEP_1104/DesignforEP_1104.htm or contact Jan Ashman at [log in to unmask]

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