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September 2004

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Subject:
From:
Barry Gallegos <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Barry Gallegos <[log in to unmask]>
Date:
Wed, 22 Sep 2004 12:14:15 -0600
Content-Type:
text/plain
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text/plain (92 lines)
Ginny,
you may find your answer in IPC-A-600, Bare board acceptability
requirements.

Barry.


-----Original Message-----
From: Jeffrey Bush [mailto:[log in to unmask]]
Sent: Wednesday, September 22, 2004 11:58 AM
To: [log in to unmask]
Subject: Re: [TN] Soldermask repair


Basic rework procedures exist in IPC-7721 - the requirements for
acceptability are outlined in IPC-6012 3.8.  Voids in the solder resist
are acceptable as long as the site does not grow when subjected to cure
and adhesion testing.  When mask is designed to the PCB edge, adhesion
failures cannot exceed 50% of the spacing to the conductor or .050"
maximum.  The rule of thumb is any mask defects that affect the assembly
or field use are not acceptable and reworks to these conditions shall
meet the soldermask performance requirements for dimensional,
mechanical, chemical and dielectric.



Jeffrey Bush
Director, Quality Assurance and Technical Support

                          76 Technology Drive - POB 1890
                             Brattleboro, Vermont 05302-1890
                                Tel. 802.257.4571.21 Fax. 802.257.0011
                                    [log in to unmask]
                              http://www.vtcircuits.com



-----Original Message-----
From: Genny Gibbard [mailto:[log in to unmask]]
Sent: Wednesday, September 22, 2004 1:08 PM
To: [log in to unmask]
Subject: [TN] Soldermask repair


All right, here's my first question for you gurus...
Is there an IPC guideline regarding repairing soldermask that may have
been removed from a PCB in an area that has only laminate being exposed?
I guess we are currently repairing soldermask even when no copper has
been exposed. Would there be any reason to consider continuing to do
this?

Thanks.

Genny

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