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August 2004

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Subject:
From:
Daan Terstegge <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Daan Terstegge <[log in to unmask]>
Date:
Fri, 27 Aug 2004 09:01:19 +0200
Content-Type:
text/plain
Parts/Attachments:
text/plain (186 lines)
With ENIG boards I have found on several occasion that boards have
excellent solderability in as-received condition, while after baking,
soldering or cleaning suddenly some problems occur. Therefore I believe
that when doing a solderability test you should use a preconditioning
that's similar to the processes that these boards have seen before they
showed wettability problems.

Daan Terstegge
Unclassified mail


>>> [log in to unmask] 08/27/04 01:23AM >>>
Hi! Depending on which 003A test method you chose either and/or both
an
assembly or fabrication house can run the 003A tests. My suggestion
would
be to run the Test method S  - surface mount simulation test. A
unpopulated
pwb is run through the standard reflow process (stencil paste and then
through the reflow oven) and then inspected for 95% minimum wetting on
the
pads. If you have a pwb wetting problem Test S typically can catch it
-
especially since Test S uses production materials and equipment. Good
Luck.

Dave



                      Ken Patel
                      <[log in to unmask]        To:
[log in to unmask], [log in to unmask], Ken Patel
<[log in to unmask]>
                      om>                      cc:
[log in to unmask]
                                               Subject:  RE: [TN]
Solderability Issue on ENIG board
                      08/26/2004 06:19
                      PM






No. Who can run it? Can I ask my fab house or assembly house to run
it?

Re,
Ken Patel

-----Original Message-----
From: [log in to unmask]
[mailto:[log in to unmask]]
Sent: Thursday, August 26, 2004 4:17 PM
To: [log in to unmask]; [log in to unmask]
Cc: [log in to unmask]
Subject: Re: [TN] Solderability Issue on ENIG board

Hi Ken! Have you run a JSTD-003A solderability test on the suspect
pwbs
yet?

Dave Hillman
Rockwell Collins
[log in to unmask]




                      Ken Patel

                      <[log in to unmask]        To:
[log in to unmask]

                      OM>                      cc:

                      Sent by: TechNet         Subject:  [TN]
Solderability
Issue on ENIG board
                      <[log in to unmask]>





                      08/26/2004 02:40

                      PM

                      Please respond to

                      TechNet E-Mail

                      Forum; Please

                      respond to Ken

                      Patel









All,
I am finding non-wetting at the certain locations on the boards (four
places
to be exact) where solder is creating golden islands (bec' of ENIG)
which
you can see in the picture. In the picture, you can see that toe of
pads
does not allow any wetting of the solder.

I would like to get an expert opinion on the subject as why certain
locations have problems and what are the possible reasons for
non-wetting.
I
very much doubt this as an assembly problem as peak temp was around
218c
and
solder remains liquidous for more than 45 seconds.



Picture can be found at...Thanks to Daan.

http://www.smtinfo.net/forum/index.php?showtopic=54
<http://www.smtinfo.net/forum/index.php?showtopic=54>



Re,

Ken Patel


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