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Subject:	Minimum ICT DFT parameters for test lands from SMTA TP-101C
From:	Gary Koven <[log in to unmask]>
Reply To:	(Designers Council Forum)
Date:	Mon, 23 Aug 2004 08:53:48 -0700
Content-Type:	text/plain
Parts/Attachments:	text/plain (50 lines)

Gentlemen,

I'm working on a board which needs ICT test points on 0.100 inch centers, single side testability, and I have real estate issues getting this done, so am researching minimum ICT DFT test land parameters.

Digging through IPC-SM-782A (1999), page 48 and 49, and IPC-2221 (1998), pages 9 and 10, I found the following minimum ICT DFT parameters for test lands.

1. Minimum pad size: 0.036 diameter, 0.032 acceptable.
2. Minimum spacing to components <0.224 high: 0.024.
3. Minimum spacing to components >0.225 high: 0.200.

Beyond IPC, however, there is a more modern publication, SMTA TP-101C (2002).  I'm aware this is a pay for use document.  However, I only need a very small piece of it.

Specifically, if anyone has access to the SMTA TP-101C (2002) document and can reply with the values for parameters 1,2, and 3 as shown in that document, I would be most appreciative!

Thanks,




=======================
Gary M. Koven, C.I.D.
Secretary, RTP Chapter
IPC Designers Council
803.417.4859
Design Your Future!
http://dcchapters.ipc.org/rtp/











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