Dear Pascal,
The intermetallic layer is very brittle, any forming operation after plating
could cause this layer to crack. The forming operation could also increase
the stress in the tin deposit.
Do you carry out an additional postbake after such operations?
Best regards,
David Gowlett
Palmer Plating Ltd
Cirencester
-----Original Message-----
From: Leadfree [mailto:[log in to unmask]] On Behalf Of
[log in to unmask]
Sent: 14 July 2004 12:53
To: [log in to unmask]
Subject: Re: [LF] Whisker test
Dear Victor and other LF subscibers
The postbake process (as indicated in an earlier mail I prefer postbake as
name) has the following theory behind it (We only apply it for Cu based
leadframes):
At this higher temperature the intermetallic will form by bulk diffusion
instead of grain boundary diffusion, taking place at ambient
temperatures. This bulk diffusion will result in a more regular layer
(in our view the irregular Cu6Sn5 formed at ambient temperatures is the
main cause for stress in the plating layer);
Because of the higher temperature a double layer of Cu3Sn and Cu6Sn5
will form;
Because of the higher temperature recrystallization will take place,
making the Sn grains larger and thus result in less grain boundaries;
The intermetallic layer formed by this postbake will form a diffusion
barrier against further irregular growth at ambient temperatures by
grain boundary diffusion;
If, and only if, there should be any stress in the plating it will be
reduced by the postbake step. This is not the principal goal of the
postbake step.
It is essentail to perform this postbake directly after plating. Within
Philips we specify within 24 hours after plating. Otherwise irregular
intermetallics might already have grown.
It should also be noted that the postbake step doesn't influence whisker
growth in temperature cycling process since this, in our view, is caused by
the mismatch between leadframe material and the Sn plating. The postbake
doesn't change the coefficient of thermal expansion.
You can find more information in several conf. proceedings, e.g. ECTC2003,
IPC/JEDEC Pb free conference San Jose 2004 and IP/Soldertec Pb free in
Amsterdam 2004 by Marc Dittes (Infineon) , Paolo Crema (STMicroelectronics)
and myself.
With kind regards,
Pascal
------------------------------------------------------------------
Dr. ir. P. Oberndorff
Philips CFT, SAQp 233
Process Technology/ Electronic Packaging & Thin Film
P.O. Box 218
5600 MD Eindhoven
Tel: +31 (0)40 27 32223
fax: +31 (0)40 27 36815
e-mail: [log in to unmask]
To: [log in to unmask]
cc: (bcc: Pascal
Oberndorff/EHV/CFT/PHILIPS)
Subject: Re: [LF]
Whisker test
"Victor G. Hernandez" Classification:
<[log in to unmask]
COM>
Sent by:
Leadfree
<[log in to unmask]>
2004-07-14 01:02 PM
Please respond to
"(Leadfree Electronics
Assembly Forum)"; Please
respond to
Victor_G_Hernandez
Fellow TechNetter:
Can someone share their understanding of the annealing process of
metals.
Victor,
-----Original Message-----
From: Leadfree [mailto:[log in to unmask]] On Behalf Of Gupta, Munish
Sent: Wednesday, July 14, 2004 3:46 AM
To: [log in to unmask]
Subject: [LF] Whisker test
14 july 04
Need expert inputs only...
Is whisker mitigation strategy* applicable for all packages.
A big package like TO220 where leads are seperated by a large
distance (much greater than what a typical length of whisker is
:
50um) should NOT undergo special tests like annealing.
Annealing is time as well as energy consuming.
*: bake for 150C @ 1hr
advised by ST , Philips , Infenion
Any comments TONY ! ! !
regards
munish
INDIA
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