It is important to know the warpage/camber/coplanarity in the BGA attach
site on reflow cool down as you pass through the freeze point of the solder.
If the PCB stack up is poorly balanced, or a heavy Cu plane terminates
half-way under a BGA attach site, or board lamination conditions (pressure,
typically) across a large BGA site is not uniform, a BGA site may be
coplanar at room temp and be badly warped at the freeze point.
Leo
------------------------------------
Leo M. Higgins III, Ph.D.
Director of Applications Engineering / ASAT Inc.
[log in to unmask]
3755 Capital of Texas Hwy-So
Suite 100
Austin, TX USA 78726
tel: 512-383-4593
fax: 512-383-1590
mobile: 512-423-2002
------------------------------------
-----Original Message-----
From: Lum Wee Mei [mailto:[log in to unmask]]
Sent: Tuesday, June 08, 2004 7:03 PM
To: [log in to unmask]
Subject: Re: [TN] Flex Rigid PCB Surface Coplanarity
Philip,
I am no reliability gal. However, from what I have been asking around
some time back regarding coplanrity especially for BGA, the board bow &
twist formula and technique is applicable. Instead of taking the entire
board, you should concentrate on the BGA footprint area. This BGA area
now become your board. Find the reading around this area as you would
for board. For PTH, bow & twist <1%, SMT <0.75% and for BGA <0.5%.
Do not asked me how the 0.5% comes about, it would given to me by Dr
John Lau when I asked about this bow & twist for BGA. I guess it has
something to do with the solder ball coplanarity being 6 mil.
That's is all I can share. Hope it is of some help.
Regards,
Wee Mei
Anslow, Phillip wrote:
>Dear TechNetters,
>
>Please can anyone point me to any specification covering the coplanarity of
>the footprints on the PCB surface?
>
>I've looked in IPC-A-600F and IPC-6010 series, and, whilst flatness in
terms
>of bow and twist is specified, there does not appear to be anything
>regarding the coplanarity across a component footprint. I have a current
>design where the use of thin dielectrics fear may tend to ape the copper
>topography on the underlying layers (they are predominantly tracks rather
>than planes). The footprints happen to be BGA, CGA and QFP for ceramic
>packages and whilst I have not yet received the boards they are to be
>assembled to, I would like to be aware if I should do measurements and to
>what limits are acceptable on receipt. I am concerned excessive undulation
>may give some soldering issues with opens but don't know if my concerns are
>unfounded.
>
>I believe various studies and consortia have measured surface coplanarity
in
>the past during studies into soldering processes etc, but unfortunately I
>lost touch with the conclusions due to an outsourcing strategy of a big
OEM.
>Maybe these concluded that board coplanarity is not an issue but if anyone
>can help reassure me, particularly regarding flex rigid PCBs with thin
>dielectrics, or if anyone has previous experience in this area you could
>share, I'd be very grateful.
>
>Many thanks in advance.
>
>Phil Anslow.
>
>
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