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April 2004

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Subject:
From:
Dennis Fritz <[log in to unmask]>
Reply To:
D-37 Sub-Committee Forum <[log in to unmask]>, [log in to unmask]
Date:
Thu, 1 Apr 2004 19:28:44 EST
Content-Type:
text/plain
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Here is the e-mail that I referenced on today's EPUG call.  Does anyone have
any further input on these papers?    Denny

**************************************
Subj:    Re: [EM] Fw: "Embedded" passive and active devices for EPUG
Date:   3/9/04 8:40:23 PM Central Standard Time
From:   [log in to unmask] (Ryusuke Yajima)
Sender: [log in to unmask] (EmbeddedNet)
Reply-to:   [log in to unmask] (D-37 Sub-Committee Forum), [log in to unmask]
(Ryusuke Yajima)
To: [log in to unmask]

 There were seminars on "Embedded Passive Devices" & "Embedded Active
Devices" at the InterNepcon Tokyo held in January, 2004.

The titles of the presentations are as follows, which may give you some of
the idea what are going on in Japan.

* Embedded Passive Devices
        Development Trends of Polymer Thick film for EPD PWBs by H.
Morooka, Asahi Chemical
                Everyone knows that Motorola is using Asahi Chemical's
Polymer Thick-film ink. See IPC EXPO Proceeding S39-3

        Development of Sheet Device Formation which realizes EPD PWBs.  by
T. Higashida, Matsushita Electric Industries
                Sheet Device is a new concept announced in 2002, where
capacitors or resistors are formed onto the film materials.
                They are seeking for the applications.

        Recent Development of "B2IT" with Embedded Passive Components/Film
Devices by Y Fukuoka, Weisti
                B2IT Technology can realize the "Chip" embedded PWBs as well
as "Formed" embedded passive devices.
                Also some of the studies were done on the "Filter" .

*Embedded Active Devices
        Challenge for Active Device Embedded Circuits by H. Utsunomiya,
Interconnection Technologies

        New Approach for Active Device-Embedded Circuits Boards by T.
Wakabayashi, Casio Computer
                This technology was co-developed by Casio and CMK. The wafer
level CSP, which is a known-good die is inserted in the build-up multilayer
boards.  Embedded Wafer Level Package-EWLP). This
technology will be soon utilized in the actual application.

        Integration of Passive and Active Components into Build-Up Layers by
R. Aschenbrenner, Fraunhofer Institute for Reliability and Microintegration
(IZM)

****************************************
Interconnect Technology Information

Ryusuke Yajima
[log in to unmask]
*****************************************
*****************************************
Subj:    RE: [EM] Fw: "Embedded" passive and active devices for EPUG
Date:   3/10/04 12:54:34 AM Central Standard Time
From:   [log in to unmask] (Ryusuke Yajima)
To: [log in to unmask]

Unfortunately, the hands-out materials are all in Japanese except IZM
Presentation.

****************************************
Interconnect Technology Information

Ryusuke Yajima
[log in to unmask]

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